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Low Power Methodology Manual: For System-On-Chip Design
This book provides a practical guide for engineers doing low power System-on-Chip (SoC) designs. It covers various aspects of low power design from architectural issues and design techniques to circuit design of power gating switches. It also describes some well established techniques and then details the latest approaches to low power design. These leading edge techniques include power gating and adaptive voltage scaling. In addition to providing a theoretical basis for these techniques, the book addresses the practical issues of implementing them in today's designs with today's tools. All of the methods used have been proven in test chips jointly developed by Synopsys and ARM.
Book Details
- Publisher: Springer
- Publish Date: May 26th, 2011
- Pages: 300
- Language: English
- Edition: undefined - undefined
- Dimensions: 8.80in - 6.00in - 0.70in - 0.95lb
- EAN: 9781441944184
- Categories: • Electronics - Microelectronics• Electrical• Electronics - Circuits - Integrated
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About the Author
ABOUT THE AUTHORS:
Michael Keating is a Synopsys Fellow in the company's Advanced Technology Group, focusing on IP development methodology, hardware and software design quality and low power design.
David Flynn is an ARM R&D Fellow and has been with the company since 1991, specializing in low power System-on-Chip IP deployment and methodology.
Robert Aitken is an ARM R&D Fellow. His areas of responsibility include memory architecture, design for testability and design for manufacturability.
Alan Gibbons is a Principal Engineer at Synopsys, with a focus on development of advanced methodology and technology for ARM processor-based system design.
Kaijian Shi is a Principal Consultant in the Professional Services Group of Synopsys, specializing in low power design methodology and implementation.
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